
In the previous month, the Google Security Team detected an issue. security vulnerability In AMD’s processors spanning from Zen 1 through Zen 4, referred to as "EntrySign," there was a vulnerability that permitted malicious users with ring 0 privileges to install unsigned microcode updates. update The AMD security bulletin has been updated to include Zen 5, encompassing all its variants within both server and consumer product lines, as part of the affected infrastructure.
The security flaw leverages an improper signature verification in AMD's microcode patch loader, allowing third parties to execute arbitrary microcode on your processor.
EntrySign (ID: AMD-SB-7033 ) aims at modifying your CPU’s microcode, which acts as fundamental commands bridging the gap between binary machine code and the actual hardware. The initial microcode comes pre-installed in the read-only memory of your processor when it leaves the factory; this original version cannot be changed once set. If vulnerabilities arise post-release, companies such as Intel and AMD have the capability to distribute updated microcodes for these processors as part of their security patches. Raptor Lake instability case, for instance).
It is accurate that the microcode within the CPU itself cannot be altered. Nonetheless, contemporary operating systems or your system’s firmware (such as BIOS/UEFI) have the capability to apply microcode updates at the beginning of each boot process. These modifications, however, remain effective solely for the length of that particular session.
By exploiting a flaw in AMD's hashing algorithm, EntrySign can circumvent the signature verification step, enabling the execution of possibly hazardous microcode. This vulnerability runs deep within server systems and has the potential to compromise AMD’s SEV/SEV-SNP security features (ID: AMD-SB-3019 — possibly leading to unauthorized access to information within virtual machines.
The main prerequisite is obtaining ring 0 access, which means having kernel-level permissions, on the intended system. Additionally, these modifications aren’t preserved following a system reboot, slightly easing concerns about security. This scenario opens doors for more inventive or theoretical approaches, including tasks like those found in the RVSPOC (RISC-V Software Porting and Optimization Championship) held in 2025. tasks contestants By using this exploit to run custom microcode, one can execute RISC-V binaries on Zen-based processors.
Every CPU from Zen 5 architecture, including Ryzen 9000 (Granite Ridge), EPYC 9005 (Turin), Ryzen AI 300 (Strix Halo, Strix Point, Krackan Point), and this continues. Ryzen 9000HX (Fire Range) processors are susceptible to this flaw. To address it, AMD has provided the ComboAM5PI 1.2.0.3c AGES firmware to manufacturers of motherboards as a solution; therefore, monitor your supplier’s site for forthcoming BIOS updates. Meanwhile, the measure aimed at mitigating the SEV vulnerability equivalent isn’t available yet for EPYC Turin models but should be rolled out before the end of the month.
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